SEMICONDUCTOR MEMORY
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United States of America Patent
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Issued Date -
Sep 15, 2016
app pub date -
Dec 9, 2015
filing date -
Dec 9, 2015
priority date (Note) -
Abandoned
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Abstract
A semiconductor memory includes a memory cell including a resistance change element and a control circuit configured to perform OFF-write processing of applying an OFF-write pulse to the memory cell for switching the state of the memory cell to a high-resistive state where a resistance value of the resistance change element is at least a first reference value and ON-write processing of applying an ON-write pulse to the memory cell for switching the state of the memory cell to a low-resistive state where the resistance value is less than a second reference value. The control circuit performs the OFF-write processing by applying an auxiliary pulse which is smaller than the OFF-write pulse in voltage amplitude to the memory cell one or more time(s) after having applied the OFF-write pulse to the memory cell.
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