Devices including memory arrays, row decoder circuitries and column decoder circuitries
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United States of America Patent
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Jul 18, 2017
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app pub date -
Mar 13, 2015
filing date -
Mar 13, 2015
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Abstract
Some embodiments include a device having an array of memory cells, a memory control unit at least partially under the array, row decoder circuitry in data communication with the memory control unit, and column decoder circuitry in data communication with the memory control unit. Some embodiments include a device having an array of memory cells, row decoder circuitry and column decoder circuitry. One of the row and column decoder circuitries is within a unit that extends at least partially under the array of memory cells and the other within a unit that is laterally outward of the array of memory cells.
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