Semiconductor memory device having memory cells provided in a height direction

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United States of America Patent

PATENT NO 9812398
APP PUB NO 20160268191A1
SERIAL NO

14849061

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Abstract

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According to an embodiment, a semiconductor memory device comprises: a memory string comprising a plurality of memory cells connected in series therein; and a contact electrically connected to one end of the memory string. The memory string comprises a plurality of control gate electrodes, and a semiconductor layer. The contact comprises a contact layer, the contact layer having a plate-like shape whose longer direction is a first direction parallel to the substrate, and the contact layer having its lower surface electrically connected to the one end of the semiconductor layer. Moreover, the contact layer includes a metal layer, a silicon based layer, and a second conductive layer. The metal layer includes tungsten. The silicon based layer includes a material including silicon. The second conductive layer covers side surfaces of the metal layer and the silicon based layer.

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Patent Owner(s)

  • TOSHIBA MEMORY CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Hu, Ming Yokkaichi, JP 233 1285
Omoto, Seiichi Yokkaichi, JP 31 249
Takewaki, Toshiyuki Yokkaichi, JP 62 503

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