Semiconductor device including buried-gate MOS transistor with appropriate stress applied thereto
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United States of America Patent
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Dec 6, 2016
Grant Date -
Sep 15, 2016
app pub date -
Sep 2, 2015
filing date -
Mar 11, 2015
priority date (Note) -
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Abstract
According to one embodiment, a semiconductor device includes a semiconductor substrate having a trench and including an active area including a channel area formed along an inner surface of the trench and source/drain areas formed at both ends of the channel area and sandwiching the trench, a gate insulating film formed on the inner surface of the trench, and a gate electrode formed in the trench in which the gate insulating film is provided. A main surface of the semiconductor substrate has {100} plane orientation, a portion of the channel area parallel to a side surface of the trench has {110} channel plane orientation and has <100> channel orientation in a channel length direction, and tensile stress in the channel length direction and compressive stress in a channel width direction are applied to the portion of the channel area parallel to the side surface of the trench.
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