Instruction and logic for scheduling instructions
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United States of America Patent
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Aug 21, 2018
Grant Date -
Sep 22, 2016
app pub date -
Feb 29, 2016
filing date -
Sep 24, 2014
priority date (Note) -
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Abstract
A processor includes a front end and a scheduler. The front end includes circuitry to determine whether to apply an acyclical or cyclical thread assignment scheme to code received at the processor, and to, based upon a determined thread assignment scheme, assign code to a static logical thread and to a rotating logical thread. The scheduler includes circuitry to assign the static logical thread to the same physical thread upon a subsequent control flow execution of the static logical thread, and to assign the rotating logical thread to different physical threads upon different executions of instructions in the rotating logical thread.
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