System and method for automatic detection of power up for a dual-rail circuit

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United States of America Patent

PATENT NO 9728232
APP PUB NO 20160275999A1
SERIAL NO

15167101

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Abstract

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When powering-up or exiting from a sleep mode, the ramping up of various supply voltage nodes may occur at different rates. Thus, in a dual-rail memory circuit, a first voltage rail may be at voltage before a second voltage rail. Such a transient state of operation may lead to current spikes that unnecessarily draw power and introduce undesired inefficiency. An internal sleep signal generation circuit in the dual-rail memory circuit precisely controls an internal sleep signal such that the transition from off or sleep mode to operating mode is set to assure that the supply voltage nodes are close enough to the at-voltage operating level before releasing the sleep mode.

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Patent Owner(s)

  • STMICROELECTRONICS INTERNATIONAL N.V.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chhabra, Amit Delhi, IN 37 108

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