Semiconductor memory device
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United States of America Patent
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Dec 20, 2016
Grant Date -
Sep 22, 2016
app pub date -
Mar 4, 2016
filing date -
Mar 4, 2016
priority date (Note) -
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Abstract
A semiconductor memory device includes memory cells, word lines that are electrically connected to gates of the memory cells, a source line that is electrically connected to one end of the memory cells, and a controller that executes a read operation over first, second, third, and fourth time periods. A first voltage is applied to a selected word line during the first and second time periods of the first operation, and a second voltage that is higher than the first voltage is applied to the selected word line during the third and fourth time periods of the second operation. A third voltage is applied to the source line during the first and third time periods, and fourth and fifth voltages that are lower than the third voltage are applied to the source line during the second and fourth time periods, respectively.
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