SPACER FORMATION PROCESS WITH FLAT TOP PROFILE

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United States of America Patent

APP PUB NO 20160307772A1
SERIAL NO

14968509

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Abstract

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Embodiments described herein relate to methods for etching a substrate. Patterning processes, such as double patterning and quadruple patterning processes, may benefit from the embodiments described herein which include performing an inert plasma treatment to implant ions into a spacer material, performing an etching process on an implanted region of the spacer material, and repeating the inert plasma treatment and the etching process to form a predominantly flat top spacer profile. The inert plasma treatment process may be a biased process and the etching process may be an unbiased process. Various processing parameters, such as pressure, may be controlled to influence a desired spacer profile.

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Patent Owner(s)

Patent OwnerAddress
APPLIED MATERIALS INC3050 BOWERS AVENUE SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
CHOI, Tom Sunnyvale, US 28 964
ZHANG, Ying Santa Clara, US 844 11140
ZHOU, Qingjun San Jose, US 35 1112

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