DUAL TRANSISTORS FABRICATED ON LEAD FRAMES AND METHOD OF FABRICATION
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United States of America Patent
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app pub date -
Apr 24, 2015
filing date -
Apr 24, 2015
priority date (Note) -
Abandoned
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Abstract
A dual transistor device includes a first transistor having a first drain, a first gate, and first source and a second transistor having a second drain, a second gate, and a second source. A first terminal is substantially flat and has a first surface. The first source is located adjacent a first portion of the first surface and is electrically coupled to the first terminal. The second drain is located adjacent a second portion of the first surface and is electrically coupled to the first terminal.
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