Importance

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Abstract

According to an embodiment, a semiconductor memory device comprises a substrate, a plurality of control gate electrodes, a semiconductor layer, a charge accumulation layer, and a contact. The plurality of control gate electrodes are stacked on the substrate. The semiconductor layer has one end thereof connected to the substrate, has as its longer direction a direction perpendicular to the substrate, and faces the plurality of control gate electrodes. The charge accumulation layer is positioned between the control gate electrode and the semiconductor layer. The contact has its lower end connected to the substrate, and is adjacent to the plurality of control gate electrodes via a first insulating layer. Moreover, a boundary of a first surface that faces a lower surface of the control gate electrode and a second surface that faces a lower surface of the first insulating layer, of an upper surface of the substrate is formed continuously.

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First Claim