SEMICONDUCTOR MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME
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United States of America Patent
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Issued Date -
Nov 3, 2016
app pub date -
Sep 9, 2015
filing date -
Apr 28, 2015
priority date (Note) -
Abandoned
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Abstract
According to an embodiment, a semiconductor memory device comprises a plurality of control gate electrodes, a semiconductor layer, a charge accumulation layer, and a contact. The plurality of control gate electrodes are stacked on a substrate. The semiconductor layer has one end thereof connected to the substrate, has as its longitudinal direction a direction perpendicular to the substrate, and faces the plurality of control gate electrodes. The charge accumulation layer is positioned between the control gate electrode and the semiconductor layer. The contact has its lower end connected to the substrate, and has its lower end and its upper end configured from a metal silicide.
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