Multi-bank memory with multiple read ports and multiple write ports per cycle
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United States of America Patent
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Oct 2, 2018
Grant Date -
Nov 10, 2016
app pub date -
Apr 17, 2016
filing date -
May 7, 2015
priority date (Note) -
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Abstract
A method for data storage includes receiving one or more read commands and one or more write commands, for execution in a same clock cycle in a memory array that comprises multiple single-port memory banks divided into groups. The write commands provide data for storage but do not specify storage locations in which the data is to be stored. One or more of the groups, which are not accessed by the read commands in the same clock cycle, are selected. Available storage locations are chosen for the write commands in the single-port memory banks of the selected one or more groups. During the same clock cycle, the data provided in the write commands is stored in the chosen storage locations, and the data requested by the read commands is retrieved. Execution of the write commands is acknowledged by reporting the chosen storage locations.
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