RECESS ARRAY DEVICE WITH REDUCED CONTACT RESISTANCE
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United States of America Patent
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Issued Date -
Nov 17, 2016
app pub date -
May 17, 2015
filing date -
May 17, 2015
priority date (Note) -
Abandoned
status (Latency Note)
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Abstract
A recess array device includes a semiconductor substrate having a main surface; a recessed trench in the main surface of the semiconductor substrate; a gate electrode disposed at a lower portion of the recessed trench; a liner layer disposed on directly on the gate electrode and being in direct contact with the gate electrode; a gate dielectric layer disposed only between the gate electrode and the semiconductor substrate and between the liner layer and the semiconductor substrate; and an epitaxial silicon layer disposed at an upper portion of the recessed trench.
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