Amplifying circuit, AD converter, integrated circuit, and wireless communication apparatus
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United States of America Patent
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Sep 12, 2017
Grant Date -
Nov 17, 2016
app pub date -
Apr 7, 2016
filing date -
May 12, 2015
priority date (Note) -
In Force
status (Latency Note)
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Abstract
An amplifying circuit according to an embodiment includes an input terminal, an output terminal, first and second operational amplifiers, first and second input impedance elements, first to third feedback impedance elements, and an adder. The first (second) operational amplifier includes an inversion input terminal connected to a first (third) node and an output terminal connected to a second (fourth) node. The first (second) input impedance element has one end connected to the input terminal and the other end connected to the first (third) node. The first (second) feedback impedance element has one end connected to the first (third) node and the other end connected to the second (fourth) node. The third feedback impedance element has one end connected to the first node and the other end connected to the fourth node. The adder adds output voltages of the first and second operational amplifiers.
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