Non-volatile memory with multiple latency tiers

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United States of America Patent

PATENT NO 9773547
SERIAL NO

15113914

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Abstract

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A non-volatile memory device with multiple latency tiers includes at least two crossbar memory arrays, each crossbar memory array comprising a number of memory cells, each memory cell connected to a word line and a bit line at a cross point. The crossbar memory arrays each have a different latency. The crossbar memory arrays are formed on a single die.

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Patent Owner(s)

  • HEWLETT PACKARD ENTERPRISE DEVELOPMENT LP

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Foltin, Martin Fort Collins, US 47 176
Henze, Richard H San Carlos, US 41 702
Jeon, Yoocharn Palo Alto, US 41 213
Lesartre, Gregg B Fort Collins, US 96 735
Muralimanohar, Naveen Santa Clara, US 89 953
Ordentlich, Erik San Jose, US 88 1203
Williams, R Stanley Portola Valley, US 277 5892

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