CHIP PACKAGE AND METHOD OF MANUFACTURING THE SAME
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United States of America Patent
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Issued Date -
Dec 1, 2016
app pub date -
May 24, 2016
filing date -
May 28, 2015
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Abstract
A chip package includes a substrate, a conductive layer and a plurality of thermal dissipation connections. The substrate includes a light-sensing region and has an upper surface and a lower surface opposite to each other. The conductive layer is disposed at the lower surface of the substrate and includes a light-shielding dummy conductive layer substantially aligned with the light-sensing region. The thermal dissipation connections are disposed beneath the lower surface of the substrate.
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