CHIP PACKAGE AND MANUFACTURING METHOD THEREOF
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
N/A
Issued Date -
N/A
app pub date -
Jun 2, 2016
filing date -
Jun 8, 2015
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
A chip package includes a chip having an upper surface and a lower surface. A sensing element is disposed on the upper surface of the chip, and a thermal dissipation layer is disposed below the lower surface of the chip. A plurality of thermal dissipation external connections are disposed below the thermal dissipation layer and in contact with the thermal dissipation layer.
First Claim
Family
International Classification(s)
- [Classification Symbol]
- [Patents Count]
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully