MICROELECTRONIC BUILD-UP LAYERS AND METHODS OF FORMING THE SAME

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United States of America Patent

APP PUB NO 20160374210A1
SERIAL NO

14905022

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Abstract

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A build-up layer may be fabricated by forming a microelectronic dielectric layer comprising a dielectric material with a metallization catalyst dispersed therein, forming a primer layer on the microelectronic dielectric layer, and forming a recess through the primer layer and into the dielectric material layer. An activation layer may be formed in or on the exposed microelectronic dielectric layer within the recess, wherein the primer layer acts as a mask. A metal layer may be formed on the activation layer, such as with an electroless process. Thus, the resolution of the metal layer deposition may be precisely controlled by the process used to form the recess.

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Patent Owner(s)

Patent OwnerAddress
INTEL CORPORATION2200 MISSION COLLEGE BOULEVARD SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
GHOSH, DASTIDAR Trina Chandler, US 4 7
LI, Yonggang Yong Chandler, US 3 9
MARIN, Brandon C San Diego, US 95 24
SENEVIRATNE, Dilan Phoenix, US 59 163

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