Technologies for memory confidentiality, integrity, and replay protection

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United States of America Patent

PATENT NO 10108557
APP PUB NO 20160378687A1
SERIAL NO

14750664

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Abstract

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Technologies for memory encryption include a computing device to generate a keyed hash of a data line based on a statistical counter value and a memory address to which to write the data line and to store the keyed hash to a cache line. The statistical counter value has a reference probability of incrementing at each write operation. The cache line includes a plurality of keyed hashes and each of the keyed hashes corresponds with a different data line. The computing device further encrypts the data line based on the keyed hash, the memory address, and the statistical counter value.

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Patent Owner(s)

  • INTEL CORP.

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chhabra, Siddhartha Hillsboro, US 224 1774
Durham, David M Beaverton, US 294 5336
Kishinevsky, Eugene M Hillsboro, US 9 103
Long, Men Beaverton, US 73 1140

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