Apparatus and method for hardware-accelerated packet processing
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United States of America Patent
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Dec 19, 2017
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app pub date -
Jun 25, 2015
filing date -
Jun 25, 2015
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Abstract
Devices and techniques for hardware accelerated packet processing are described herein. A device can communicate with one or more hardware switches. The device can detect characteristics of a plurality of packet streams. The device may distribute the plurality of packet streams between the one or more hardware switches and software data plane components based on the detected characteristics of the plurality of packet streams, such that at least one packet stream is designated to be processed by the one or more hardware switches. Other embodiments are also described.
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