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Abstract

Aspects of the disclosure relate to storage systems for providing low latency read access of a non-volatile memory. One such system includes a non-volatile memory (NVM) configured for read access via a primary data path, a syndrome checker disposed along the primary read data path and configured to check a codeword read from the NVM for errors, an error correction code circuitry disposed outside of the primary data path and, if the codeword is determined to contain an error, configured to determine a location of the error in the codeword, and a queue disposed along the primary read data path. The queue is configured to receive the codeword from the syndrome checker and output the codeword to a host. If the codeword is determined to contain the error, the queue corrects the error based on the determined location of the error from the error correction code circuitry.

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First Claim