SEMICONDUCTOR MEMORY DEVICE
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United States of America Patent
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N/A
Issued Date -
Jan 19, 2017
app pub date -
Feb 2, 2016
filing date -
Jul 15, 2015
priority date (Note) -
Abandoned
status (Latency Note)
Importance
Abstract
According to one embodiment, a semiconductor memory device comprises a first stacked body, a column, a second stacked body, a through portion, and a first insulating portion. The first stacked body includes first conductive layers and first insulating layers. The first conductive layers and the first insulating layers are stacked in alternation. The column extends in the first stacked body in a stacking direction of the first conductive layers and the first insulating layers. The second stacked body is separated from the first stacked body on at least one portion of a periphery of the first stacked body. The through portion extends in at least one portion of the second stacked body in the stacking direction. The first insulating portion is provided at the periphery of the first stacked body and at a periphery of the second stacked body.
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