Dynamic clock synchronization
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United States of America Patent
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Jul 4, 2017
Grant Date -
Jan 19, 2017
app pub date -
Jun 30, 2016
filing date -
Jul 17, 2015
priority date (Note) -
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Abstract
A semiconductor device includes: a clock synchronizing circuit that operates in synchronization with a clock; an enable signal generating circuit that generates an enable signal in an operation period during which the clock synchronizing circuit is operated; and a clock supplying circuit that supplies a clock to the clock synchronizing circuit or stop the supply of the clock according to the enable signal when a clock frequency is equal to or lower than a predetermined frequency, and supply a clock to the clock synchronizing circuit, irrespective of the enable signal, when the clock frequency is higher than the predetermined frequency.
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