Semiconductor Device and Method of Manufacturing the Same

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United States of America Patent

SERIAL NO

15284812

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Abstract

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It is an object to form a buffer circuit, an inverter circuit, or the like using only n-channel TFTs including an oxide semiconductor layer. A buffer circuit, an inverter circuit, or the like is formed by combination of a first transistor in which a source electrode and a drain electrode each overlap with a gate electrode and a second transistor in which a source electrode overlaps with a gate electrode and a drain electrode does not overlap with the gate electrode. Since the second transistor has such a structure, the capacitance Cp can be small, and VA′ can be large even in the case where the potential difference VDD−VSS is small.

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Patent Owner(s)

Patent OwnerAddress
SEMICONDUCTOR ENERGY LABORATORY CO LTD398 HASE ATSUGI-SHI KANAGAWA-KEN 243-0036

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
MIYAKE, Hiroyuki Atsugi, JP 597 11433

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