Memory device, host device, and memory system

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United States of America Patent

PATENT NO 10615959
SERIAL NO

15213918

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Abstract

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A control circuit causes a first cryptographic module to perform a dummy operation in a command processing period and a data processing period in which a second cryptographic module performs a normal operation while the first cryptographic module does not perform a normal operation.

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Patent Owner(s)

Patent OwnerAddress
MEGACHIPS CORPORATION1-6 MIYAHARA 4-CHOME YODOGAWA-KU OSAKA-SHI OSAKA 532-0003

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Sugahara, Takahiko Osaka, JP 28 132
Yutani, Hiromu Osaka, JP 4 8

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