Information processing device including host device and semiconductor memory device having a block rearrangement to secure free blocks

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 9870155
SERIAL NO

15347528

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Abstract

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A device includes a host including a main memory, and semiconductor memory including a nonvolatile semiconductor memory, memory unit, and controller. The nonvolatile semiconductor memory stores first address information. The memory unit stores second address information as part of the first address information. The controller accesses the nonvolatile semiconductor memory based on the second address information. Third address information is stored in the main memory, and is part or all of the first address information. The controller uses the third address information when accessing the nonvolatile semiconductor memory if address information to be referred is not stored in the second address information.

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Patent Owner(s)

  • TOSHIBA MEMORY CORPORATION

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kunimatsu, Atsushi Funabashi, JP 57 1462
Maeda, Kenichi Kamakura, JP 129 2838

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