METHOD OF HANDLING AN INSTRUCTION DATA IN A PROCESSOR CHIP
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United States of America Patent
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Issued Date -
Mar 2, 2017
app pub date -
Nov 25, 2015
filing date -
Aug 26, 2015
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Abstract
The processor chip can have a pre-execution pipeline sharing a plurality of resources including at least one resource of interest, a resource tracker having more than one credit unit associated to each one of said at least one resource of interest. The method can include: decoding the instruction data to determine a resource requirement including a quantity of virtual credits required from the credit units for the at least one resource of interest, checking the resource tracker for an availability of said quantity of virtual credits and, if the availability of the amount of said virtual credits is established, i) dispatching the instruction data, and ii) subtracting the quantity of said credits from the resource tracker.
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