Memory control circuit for controlling memory device that operates in self-refresh mode, and method of controlling the same
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United States of America Patent
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Sep 12, 2017
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N/A
app pub date -
Aug 22, 2016
filing date -
Aug 26, 2015
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Abstract
A memory control circuit capable of holding a memory device in a self-refresh mode even when a memory controller is powered off and then restarted. The controller performs data memory reset processing including deleting data in a buffer of a volatile memory device which operates when supplied with power from a first power supply, by changing an effective memory reset signal after the voltage of a second power supply becomes equal to or higher than a predetermined value. The memory reset signal is masked when an effective mask signal is generated. Whether to keep the data is determined when an event occurs which makes the voltage of the second power supply lower than the reset reference value and the first power supply is on. The memory reset signal is masked by making the mask signal effective when the data is determined to be kept.
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