Method for manufacturing a semiconductor device with increased breakdown voltage

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United States of America Patent

PATENT NO 9812554
SERIAL NO

15000786

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Abstract

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According to one embodiment, a method for manufacturing a semiconductor device comprises making a first opening, ion-implanting an impurity of a second conductivity type, and forming a third semiconductor layer of the second conductivity type. The first opening is made in a second semiconductor layer. The second semiconductor layer is provided on a first semiconductor layer. The first opening extends in a second direction. A dimension in a third direction of an upper part of the first opening is longer than a dimension in the third direction of a lower part of the first opening. The third direction is perpendicular to the first direction and the second direction. The impurity of the second conductivity type is ion-implanted into a side surface of the lower part of the first opening. The third semiconductor layer of the second conductivity type is formed in an interior of the first opening.

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Patent Owner(s)

  • KABUSHIKI KAISHA TOSHIBA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Sakuma, Tomoyuki Nonoichi Ishikawa, JP 8 44
Sato, Shinya Nonoichi Ishikawa, JP 169 1120
Shimada, Akihiro Kanazawa Ishikawa, JP 38 207
Yokoyama, Noboru Kanazawa Ishikawa, JP 25 247

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