Semiconductor memory in which source line voltage is applied during a read operation

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United States of America Patent

PATENT NO 9672929
APP PUB NO 20170069394A1
SERIAL NO

15174114

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Abstract

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A semiconductor memory device includes a memory cell, a word line electrically connected to a gate of the memory cell, and a source line electrically connected to a first end of the memory cell. During a read operation of the memory cell, a first voltage is applied to the source line in a first operation to determine whether or not a threshold voltage of the memory cell is above a first threshold value, a second voltage is applied to the source line in a second operation to determine whether or not the threshold voltage of the memory cell is above a second threshold value, and a third voltage is applied to the source line in a third operation to determine whether or not the threshold voltage of the memory cell is above a third threshold value.

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Patent Owner(s)

  • TOSHIBA MEMORY CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Maejima, Hiroshi Tokyo, JP 234 4162

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