Importance

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Abstract

A semiconductor memory device includes a first block having a first memory cell and a second block having a second memory cell, first and second word lines respectively connected to the first and second memory cells, first and second select transistors having first ends respectively connected to the first and second word lines, a first circuit configured to apply a voltage to the first word line, and to control a gate voltage of the second select transistor, a second circuit configured to apply a voltage to the second word line, and to control a gate voltage of the first select transistor, first and second wirings respectively connected to second ends of the first and second select transistors, a third circuit configured to apply a voltage to the first wiring, and a fourth circuit configured to apply a voltage to the second wiring.

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First Claim