Pipeline multiplexer loop architecture for decision feedback equalizer circuits
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United States of America Patent
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Jun 27, 2017
Grant Date -
Mar 30, 2017
app pub date -
Sep 30, 2015
filing date -
Sep 30, 2015
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Abstract
Circuits, devices, methods for decision feedback equalization are described. A decision feedback circuit can include L N-tap decision feedback equalizer (DFE) branches. The L N-tap DFE branches can include K unrolled DFE branches, and L−K unfolded DFE branches. Each DFE branch can include a pre-computation stage configured to generate a set of tap-adjusted inputs, each tap-adjusted input corresponding to a possible value for at least one previous output of the same DFE branch. Each unrolled DFE branch can include a multiplexer circuit having selection lines for selecting from the set of tap-adjusted inputs for the unrolled DFE branch, the selection lines being connected to outputs of other DFE branches. Each unfolded DFE branch can include a multiplexer circuit configured to select at least one output from the set of tap-adjusted inputs based on tap-adjusted inputs from other DFE branches.
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