Semiconductor memory systems with on-die data buffering
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United States of America Patent
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Sep 3, 2019
Grant Date -
Apr 6, 2017
app pub date -
Oct 24, 2016
filing date -
Oct 16, 2012
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Abstract
A semiconductor memory system includes a first semiconductor memory die and a second semiconductor memory die. The first semiconductor memory die includes a primary data interface to receive an input data stream during write operations and to deserialize the input data stream into a first plurality of data streams, and also includes a secondary data interface, coupled to the primary data interface, to transmit the first plurality of data streams. The second semiconductor memory die includes a secondary data interface, coupled to the secondary data interface of the first semiconductor memory die, to receive the first plurality of data streams.
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