Solid-state imaging device with correction of a lower count value or upper count value
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United States of America Patent
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Oct 10, 2017
Grant Date -
Apr 27, 2017
app pub date -
Sep 6, 2016
filing date -
Oct 22, 2015
priority date (Note) -
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Abstract
A solid-state imaging device includes a pixel, a comparator outputting control signal when magnitude relationship between pixel signal and reference signal is inverted, a counter circuit unit outputting N-bit count signal, a memory unit holding each bit of the count signal, wherein the count value is corrected according to the relationship between lower count value represented by lower count signal group including LSB to M-th bit of the count signal, and the upper count value represented by upper count signal group including (M+1)-th to N-th bits of the count signal. The lower count signal group comprises M-bit Gray code count signal of LSB to M-th bit of the count signal and a binary code count signal of (M+1)-th bit of the count signal, and the upper count signal group comprises (N-M) bit Gray code signal whose LSB is (M+1)-th bit of the count signal.
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