Latent modification instruction for transactional execution
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United States of America Patent
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Dec 26, 2017
Issued Date -
N/A
app pub date -
Jan 11, 2017
filing date -
Jun 30, 2014
priority date (Note) -
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status (Latency Note)
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Abstract
An instruction stream includes a transactional code region. The transactional code region includes a latent modification instruction (LMI), a next sequential instruction (NSI) following the LMI, and a set of target instructions following the NSI in program order. Each target instruction has an associated function, and the LMI at least partially specifies a substitute function for the associated function. A processor executes the LMI, the NSI, and at least one of the target instructions, employing the substitute function at least partially specified by the LMI. The LMI, the NSI, and the target instructions may be executed by the processor in sequential program order or out of order.
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