THERMALLY ENHANCED SEMICONDUCTOR ASSEMBLY WITH THREE DIMENSIONAL INTEGRATION AND METHOD OF MAKING THE SAME
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
N/A
Issued Date -
N/A
app pub date -
Jan 25, 2017
filing date -
May 27, 2015
priority date (Note) -
Published
status (Latency Note)
Importance
Abstract
A semiconductor assembly with three dimensional integration includes a face-to-face semiconductor sub-assembly electrically coupled to a heat spreader by bonding wires. The face-to-face semiconductor sub-assembly includes top and bottom devices assembled on opposite sides of a first routing circuitry, and the heat spreader includes a metal plate and a second routing circuitry on the metal plate. The sub-assembly is disposed in a through opening of the second routing circuitry of the heat spreader, and the bonding wires provide electrical connections between the first and second routing circuitries for interconnecting the devices face-to-face assembled in the sub-assembly to terminal pads provided in the heat spreader
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully