Control and synchronization mechanism for a complex distributed power management system

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United States of America Patent

PATENT NO 10241551
APP PUB NO 20170153680A1
SERIAL NO

15284608

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Abstract

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A distributed power management system comprising at least two power management integrated circuits PMICs is presented. A master power management integrated circuit PMIC supplies power to a subsystem of an electronic device based on a current state of a master finite state machine FSM executed by the master PMIC. A slave power management integrated circuit PMIC executes a slave finite state machine FSM and supplies power to another subsystem based on the current state of the master FSM. For synchronizing the operation of both PMIC, the master PMIC transmits, to the slave PMIC, synchronization information indicative of at least one of an input signal of the master FSM, a state of the master FSM, a state transition of the master FSM, and an output signal generated by the master FSM. A distributed power management method is presented which is carried out by a master PMIC and a slave PMIC.

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Patent Owner(s)

  • DIALOG SEMICONDUCTOR (UK) LIMITED

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Giorgetti, Daniele Munich, DE 8 67
Girard, Olivier Munich, DE 28 83
Martins, Joao Paulo Trierveiler Graz, AT 3 22
Todd, Philip Corsham, GB 6 45

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