MEMORY REFRESH METHOD AND DEVICES

Number of patents in Portfolio can not be more than 2000

United States of America Patent

SERIAL NO

15391295

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

The present disclosure describes DRAM architectures and refresh controllers that allow for scheduling of an opportunistic refresh of a DRAM device concurrently with normal row activate command directed toward the DRAM device. Each activate command affords an “opportunity” to refresh another independent row (i.e., a wordline) within a memory device with no scheduling conflict.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

Patent OwnerAddress
RAMBUS INC4453 NORTH FIRST STREET SUITE 100 SAN JOSE CA 95134

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Brooks, John San Jose, US 30 500
Perego, Richard Thornton, US 11 704
Vogelsang, Thomas Mountain View, US 165 1485

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation