Processor instructions to accelerate FEC encoding and decoding

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United States of America Patent

PATENT NO 10691451
APP PUB NO 20170185399A1
SERIAL NO

15390910

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Abstract

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Various embodiments are described of a system for improved processor instructions for a software-configurable processing element. In particular, various embodiments are described which accelerate functions useful for FEC encoding and decoding. In particular, the processing element may be configured to implement one or more instances of the relevant functions in response to receiving one of the processor instructions. The processing element may later be reconfigured to implement a different function in response to receiving a different one of the processor instructions. Each of the disclosed processor instructions may be implemented repeatedly by the processing element to repeatedly perform one or more instances of the relevant functions with a throughput approaching one or more solutions per clock cycle.

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Patent Owner(s)

Patent OwnerAddress
COHERENT LOGIX INCORPORATED1120 SOUTH CAPITAL OF TEXAS HIGHWAY BUILDING 3 SUITE 310 AUSTIN TX 78746

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bindloss, Keith M Irvine, US 19 346
Dobbs, Carl S Austin, US 43 556
Mezhibovsky, Evgeny Waterloo, CA 4 13
Raza, Zahir Waterloo, CA 7 39
Shelby, Kevin A Austin, US 106 1109

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