Logic built in self test circuitry for use in an integrated circuit with scan chains

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United States of America Patent

PATENT NO 10088524
APP PUB NO 20170192054A1
SERIAL NO

14987848

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Abstract

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Aspects include a system having logic built-in self-test (LBIST) circuitry for use in an integrated circuit with scan chains. The system includes a pattern generator configured for generating scan-in test values for said scan chains; a signature register configured for collecting scan-out responses from said scan chains after a clock sequence; an on-product control generator configured for controlling at least one test parameter; one or more microcode array or memory elements configured to receive inputs to initialize fields in the microcode array or memory elements; and a test controller. The test controller includes a reader component configured for reading test parameters from a field of the microcode array or the memory elements; and a programming component configured for configuring the on-product control generator and the pattern generator with a LBIST pattern according to the read test parameters.

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Patent Owner(s)

  • IBM CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bhamidipati, Satya R S Akividu, IN 7 5
Gopalakrishnasetty, Raghu G Bangalore, IN 20 32
Kusko, Mary P Poughkeepskie, US 78 381
Lichtenau, Cedric Boeblingen, DE 119 278

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