Chip package assembly with power management integrated circuit and integrated circuit die

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 10665579
APP PUB NO 20170236809A1
SERIAL NO

15045228

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Abstract

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A chip package assembly is provided that includes a substrate, at least one integrated circuit (IC) die and a power management integrated circuit (PMIC). In one example, the IC die of the chip package assembly is disposed on a first surface of the substrate. The PMIC die has a first surface having outputs electrically coupled to the second surface of the IC die. The PMIC die also has a second surface facing away from the first surface. The second surface of the PMIC die has inputs that are electrically coupled to the first surface of the substrate.

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Patent Owner(s)

  • XILINX INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Mahoney, David M Gilroy, US 19 169
Mardi, Mohsen H Saratoga, US 29 212
Trimberger, Stephen M Incline Village, US 250 11860

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