Die stack assembly using an edge separation structure for connectivity through a die of the stack
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United States of America Patent
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Aug 4, 2020
Grant Date -
Sep 28, 2017
app pub date -
Jun 11, 2017
filing date -
Feb 29, 2016
priority date (Note) -
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status (Latency Note)
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Abstract
A die stack assembly includes first and second power semiconductor device dice. The first die has a P type peripheral edge separation structure that extends from the top planar semiconductor surface of the first die all the way to the bottom planar semiconductor surface of the die, and that is doped at least in part with aluminum. The backside of the first die is mounted to the backside of the second die. A metal feature that is not covered with passivation, and that can serve as a bonding pad, is disposed on part of the peripheral edge separation structure. A metal member (for example, a bond wire or metal clip) contacts the metal feature such that an electrical connection is established from the metal member, through the metal feature, through the peripheral edge separation structure of the first die, and to an electrode of the second die.
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