Instruction, Circuits, and Logic for Graph Analytics Acceleration
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United States of America Patent
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Apr 1, 2016
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Apr 1, 2016
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Abstract
A processor includes a front end including circuitry to receive and decode an instruction. The instruction is to perform a graph analytic function and pass the instruction to a graph accelerator. The graph accelerator including circuitry to process graph vertices and graph edges as datatypes, execute the instruction, and pass results of the instruction to a memory subsystem of the processor.
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