METHOD AND APPARATUS FOR USING TARGET OR UNIT UNDER TEST (UUT) AS DEBUGGER

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United States of America Patent

APP PUB NO 20170286254A1
SERIAL NO

15085733

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Abstract

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A method and apparatus for collecting debug and crash information are described. In one embodiment, a system comprises one or more compute engines an external interface; a non-volatile memory coupled to the external interface and operable to store captured information, wherein the captured information comprises one or both of debug information and crash information; a first trace aggregator coupled to the non-volatile memory and the one or more compute engines to capture the one or both of debug information and crash information from at least one of the one or more compute engines in response to a crash of the system; and a controller, coupled to the non-volatile memory and the first trace aggregator, to cause captured information to be sent from the first trace aggregator to the non-volatile memory and to subsequently control transfer of the captured information stored in the non-volatile memory to the external interface.

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Patent Owner(s)

Patent OwnerAddress
INTEL CORPORATION2200 MISSION COLLEGE BOULEVARD SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Dutta, Pronay Beaverton, US 16 241
Kuehnis, Rolf H Portland, US 14 52
Menon, Sankaran M Austin, US 27 255
Penner, William H Olympia, US 3 47

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