Apparatuses and methods using dummy cells programmed to different states

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United States of America Patent

PATENT NO 10079064
APP PUB NO 20170287565A1
SERIAL NO

15627212

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Abstract

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Apparatuses and methods for reducing capacitive loading are described. One apparatus includes a first memory string including first and second dummy memory cells, a second memory string including third and fourth dummy memory cells, and a control unit configured to provide first and second control signals to activate the first and second dummy memory cells of the first memory string, and to further deactivate at least one of the third and fourth dummy memory cell of the second memory string.

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Patent Owner(s)

  • MICRON TECHNOLOGY INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Tanzawa, Toru Adachi, JP 306 5157
Yip, Aaron Los Gatos, US 114 1181

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