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Abstract

Thin film 1S1R bitcells incorporating a barrier between selector and memory elements. Devices incorporating such bitcells and methods of forming such bitcells are also described. In embodiments, the selector and memory element is each a dielectric material, and advantageously a metal oxide. Between the selector and memory elements is a barrier, which is to reduce intermixing and/or reaction of selector material and memory material. Addition of a barrier layer having suitable material properties into the 1S1R stack may extend the operating lifetime of a bitcell incorporated the stack by resisting intermixing and/or reaction of the selector and memory thin film materials driven by thermal and/or electric field stresses experienced by a bitcell during operation. In embodiments, a barrier layer may include one or more material layers having a composition distinct from the material composition(s) of the selector and memory elements.

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First Claim