An arithmetic processing device includes: an instruction control circuit; primary cache circuit that includes a primary cache memory and a first buffer; and a secondary cache memory. The primary cache circuit is configured to, when a first instruction for executing processing to register data of a cache line in the secondary cache memory without the occurrence of an access to the main memory, is issued from the instruction control circuit and when data corresponding to a first address designated as an access target in the first instruction is not stored in the primary cache memory, store the first address in the first buffer and issue the first instruction to the secondary cache memory.
Please note there is up to 60 days of latency in this Status indicator for certain status conditions. You can obtain up-to-date Status indicator readings by ordering PAIR for the file.
An application with the status "Published" (which means it is pending) may be recently abandoned, but not yet updated to reflect its abandoned status. However, an application filed less than one year ago is unlikely to be abandoned.
A patent with the status "Granted" may be recently expired, but not yet updated to reflect its expired status. However, it is highly unlikely a patent less than 3.5 years old would be expired.
An application with the status "Abandoned" is almost always current, but there is a small chance it was recently revived and the status not yet updated.
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