An arithmetic processing apparatus includes a prefetch unit configured to send a prefetch request to a subordinate cache memory for prefetching data of a main storage device into a primary cache memory. The arithmetic processing apparatus further includes a count unit configured to count a hit count of how many times it is detected that prefetch request target data is retained in the subordinate cache memory when executing a response process to respond to the prefetch request sent from the prefetch unit. The arithmetic processing apparatus yet further includes an inhibition unit configured to inhibit the prefetch unit from sending the prefetch request when the counted hit count reaches a threshold value.
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