Method and Apparatus for a Segmented On-Chip Digital Interface Block

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United States of America Patent

APP PUB NO 20170300438A1
SERIAL NO

15132412

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Abstract

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A method and architecture for operating with distributed (or segmented) on-chip digital interfaces such as the Inter-Integrated Circuit protocol and a Serial Peripheral Interface protocol. This method and architecture, illustratively, divides the available address space of the digital interface register arrays of a device into one or more segments referred to as a fundamental digital interface circuit. Such segmentation allows for each fundamental digital interface circuit to be placed in proximity of the digitally controlled circuit(s) (e.g., analog circuit(s)) which share some operational connection and for exchanging communication in accordance with a plurality of inputs to the device.

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Patent Owner(s)

Patent OwnerAddressTotal Patents
ALCATEL-LUCENT USA INC.MURRAY HILL, NJ1791

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