A storage array and systems for configuring a storage array are provided. In one example, the storage array includes a motherboard. The motherboard includes a first compute module and an input/output (I/O) mid-plane that is routed to the first compute module. The I/O mid-plane has a plurality of peripheral component interconnect express (PCIe) lanes coupled to the first compute module. A bridge module interconnect is routed to the I/O mid-plane via one or more of the plurality of PCIe lanes of the I/O mid-plane. The bridge module interconnect provides bridge connections to receive to two or more types of protocol bridge modules. A storage mid-plane provides integrated routing between each of a plurality of drive connectors and each of the bridge connections of the two or more types of protocol bridge modules of the bridge module interconnect. In some configurations, the I/O mid-plane is eliminated and that functionality is integrated into a combination of boards referred to as upper and lower storage docking modules, while maintaining the storage mid-plane.
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